'Minimizing Switched Capacitance - V' Video Lecture

Minimizing Switched Capacitance - V

  • Course: Low Power VLSI Circuits & Systems
  • Discipline: Computer Science and Engineering
  • Faculty: Prof. Ajit Pal
  • Institute: IIT Kharagpur

    • Minimizing Switched Capacitance - V - Click on the Video Link shown below to play the video on Youtube. Browse through Low Power VLSI Circuits & Systems (Computer Science and Engineering) Video Lectures by Prof. Ajit Pal from IIT Kharagpur through NPTEL.

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    Course Video Lectures Introduction & Course Outline MOS Transistors - I MOS Transistors - II MOS Transistors - III MOS Transistors - IV MOS Inverters - I MOS Inverters - II MOS Inverters - III MOS Inverters - IV Static CMOS Circuits - I Static CMOS Circuits -II MOS Dynamic Circuits -I MOS Dynamic Circuits -II Pass Transistor Logic Circuits - I Pass Transistor Logic Circuits - II MOS Memories Finite State Machines Switching Power Dissipation Tutorial - I Dynamic Power Dissipation Leakage Power Dissipation Supply Voltage Scaling - I Supply Voltage Scaling - II Supply Voltage Scaling - III Supply Voltage Scaling - IV Tutorial - II Minimizing Switched Capacitance - I Minimizing Switched Capacitance - II Minimizing Switched Capacitance - III Minimizing Switched Capacitance - IV Minimizing Switched Capacitance - V Minimizing Leakage Power - I Minimizing Leakage Power - II Minimizing Leakage Power - III Variation Tolerant Design Adiabatic Logic Circuits Battery-Driven System Design CAD Tools for Low Power Tutorial - III Course Summary
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