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Design Verification and Test o..
Lecture# 30
'Fault Equivalence' Video Lecture
Fault Equivalence
Course
:
Design Verification and Test of Digital VLSI Circuits
Discipline
:
Computer Science and Engineering
Faculty
: Dr. Santosh Biswas, Prof. Jatindra Kumar Deka
Institute
:
IIT Guwahati
Fault Equivalence
- Browse through
Design Verification and Test of Digital VLSI Circuits (Computer Science and Engineering)
Video Lectures by
Dr. Santosh Biswas, Prof. Jatindra Kumar Deka
from
IIT Guwahati
through NPTEL.
Course
:
Design Verification and Test of Digital VLSI Circuits
Discipline
:
Computer Science and Engineering
Faculty
: Dr. Santosh Biswas, Prof. Jatindra Kumar Deka
Institute
:
IIT Guwahati
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Fault Simulation-1
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Course Video Lectures
Introduction to Digital VLSI Design Flow
High Level Design Representation
Transformations for High Level Synthesis
Introduction to HLS: Scheduling, Allocation a..
Scheduling Algorithms-1
Scheduling Algorithms-2
Binding and Allocation Algorithms
Two level Boolean Logic Synthesis-1
Two level Boolean Logic Synthesis-2
Two level Boolean Logic Synthesis-3
Heuristic Minimization of Two-Level Circuits
Finite State Machine Synthesis
Multilevel Implementation
Introduction to formal methods for design ver..
Temporal Logic: Introduction and Basic Opera..
Syntax and Semantics of CTL
Syntax and Semantics of CTL - Continued
Equivalence between CTL Formulas
Introduction to Model Checking
Model Checking Algorithms I
Model Checking Algorithms II
Model Checking with Fairness
Binary Decision Diagram: Introduction and co..
Ordered Binary Decision Diagram
Operation on Ordered Binary Decision Diagram
Ordered Binary Decision Diagram for State Tra..
Symbolic Model Checking
Introduction to Digital VLSI Testing
Functional and Structural Testing
Fault Equivalence
Fault Simulation-1
Fault Simulation-2
Fault Simulation-3
Testability Measures (SCOAP)
Introduction to Automatic Test Pattern Genera..
D-Algorithm-1
D-Algorithm-2
ATPG for Synchronous Sequential Circuits
Scan Chain based Sequential Circuit Testing-1
Scan Chain based Sequential Circuit Testing-2
Built in Self Test-1
Built in Self Test-2
Memory Testing-1
Memory Testing-2
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